Everyone saying that it's impossible that a CPU could fail to 32-bits is potentially wrong. On the surface level, the distinction between a 32-bit and 64-bit CPU is the word size. This is just essentially a measure of how large the chunks of data that the processor deals with are. This means 64-bit CPUs have 64-bit registers (used to load/store values into and the results of computations--you can think of them as the paper you use when you're doing math just as you write down the problem, intermediate steps, and the answer, CPUs store that sort of info in registers), can read from memory in 64-bit chunks (and no--mind you--by memory I don't mean RAM. RAM is much too slow for a CPU to read directly from, and only at 64 bits at a time. I mean the CPU's cache. Ultimately all instructions your CPU runs are read from the far faster cache), and so on.
What you should take away from a lot of this is that the word size dictates the physical structure--on the transistor level--of the CPU. In a CPU there are variois components that are connected In a pathway. You might have an ALU connected to a pipeline register. Or opcode logic connected to an ALU. The point is you can imagine that the "wiring" that connects the "upper bits" of the 64 bits somehow failed (also note that Intel CPUs are little endian so it's really the "lower bits") on one of he steps.
If you've ever programmed a 64-bit machine in assembly you'll be familiar with the fact that there are special 32-bit registers that essentially allow you to access the 32-bit section of the 64-bit registers. That's how 64-bit CPUs run in 32-bit mode (but this property isn't universal to 64-bit CPUs and only works because x86-64 is an extension of he original x86 instruction set. Things like opcode location in the address space and so on and so forth surely had to be maintained.
Anyway, with all that in mind, you can imagine that some process in the CPU that deals with the extra 32-bits of the 64-bit address space fails that doesn't affect 32-bit functionality. But I think with how ferociously complicated modern CPUs are and how many operations are performed by the CPU itself and not from instructions from memory (things like pipelining are physically hard-coded onto the CPU) leads me to believe such an error is either extremely extremely improbably or potential impossible on modern architecture. However, from my simple what-I-learned-as-an-undergrad-taking-a-computer-systems-class it seems possible.
As for addressing your actual issue. No idea. :)