Actually that's completely wrong, actual answer is pretty hard to explain and even meaning of hyperthreading (aka SMT) has changed in implementation and would probably require 101 hardware design course.

To somewhat reuse your analogy, 1CPU core is an mcdonald restaurant with bunch of customers queued and 1/2 cashiers (non-HT, HT).

In non-HT case a cashier takes a pizza order (non cached instruction that has to go to memory for instruction Fetch), then passes the order (intstruction Decode) and cook puts pizza into oven (instruction Execute). These 3 steps take wildly varying time (F-D-E) and even though all 3 workers work simultaneously (this is called CPU pipelining), inevitably there are delays when certain operations take more time (making hotdog - adding two integers, making pizza - executing complex string compare instruction, taking value from CPU register - 1cycle vs getting value from ram 100s of cycles).

With SMT you basically have two cashiers, while the first one is waiting around for instruction fetch from RAM, second one can be passing order and making hotdogs.

Instead of having more computational resources (pizza oven - FPU, hotdog machine - ALU) like you would have with two physical cores (2 restaurants), you just double the staff who try their best to utilize their resources.

Hopefully that makes some sense, even though I already made quite a lot of oversimplifications.