Keep in mind there was a rumour that the reason for the 256bit bus and rDNA2s relative lack of sensitivity to memory bandwidth was due to vastly increased caching abilities on the GPU itself thanks to the addition of an HBM2 based L4 cache.

It also makes sense and is proven; look at how fast two identical Intel iGPUs are when one has the fast Iris Pro cache while the other doesn't. For rDNA2, HBM2 isn't cheap but a single die of it built into the GPU itself (ie. no interposer costs) isn't all that expensive especially if it allows you to vastly reduce the size of your memory bus and therefore buy fewer GDDR chips per GPU while also lowering the base PCB costs to boot. We know from the console APUs that AMD easily has the die space to do so.