Going to try and address quickly some of the points various people have raised....

The reason Intel have large dies and not small, desktop dies glued together is for latency performance and Numa reasons. They could do it, no problem, they have multi chip package products available already and have had for a while.

Threadripper is the first time that the public will be able to see what implications for performance come with the infinity fabric. And please remember, performance is not bandwidth here. Performance is LATENCY.

If there is significant extra latency, as expected, then epyc is dead in the water due to inferior caching architecture (4*16MB separate chunks), heavy Numa impact (running like a 4 socket system), unbalanced i/o to memory resources (32 pcie lanes to 2 memory controllers per Desktop die), no AVX3, unproven in the field, modifications needed in data centres to support, increased SW license costs.

There are benefits in more memory controllers, more pcie, a few more cores, but the unbalanced I/O is a pain (memory bandwidth vs pcie bandwidth per Zeppelin), and not all cores are the same. If you're on AVX workloads, you don't even consider AMD.

Move onto 2S systems and it gets worse. The Pcie lane counts advantage is all but eradicated as Intel doubles their lane counts with CPUs. You're up to at least 8 Numa blocks in 2S vs Intels 2, which is significant.

Also, with regards to cost, TCO is king. Intel has a vast array of peripheral technologies to bring more control to the cost of the rest of the system. They can cut do deal pricing for ssds, nics, etc.

Everyone wants a competitor in Data Centre to drive down costs and increase competition, but some tradeoffs made in Epyc has significantly reduced their broad market applicability. It's a first step to try and capture maybe 5% MSS if they're lucky and they haven't cocked up eco-system enabling.

Tl;Dr only consumers assume equal performance in TR and higher products. Anyone in industry knows that it's a massively uphill battle